Kirchhoff's Current Law (KCL): 7 Solved Problems Step by Step

GATE EENetwork Theory · DC Circuits

Kirchhoff's Current Law (KCL) – Solved Problems with Step-by-Step Explanation

Learn Kirchhoff's Current Law from the basics to GATE level: the statement, the sign convention, generalised KCL and the supernode, followed by 7 fully solved problems, including dependent-source and supernode circuits.

✍️By Sanket Barde ⏱️17 min read 📝7 solved problems 🎯GATE EE · BEE

⚡ In 30 seconds

  • KCL: the algebraic sum of currents at a node is zero, so total current entering = total current leaving.
  • It comes from conservation of charge and holds for DC, AC, linear, non-linear and time-varying circuits.
  • KCL also applies to any closed surface (supernode), which is why we can skip the inside of a network.
  • A circuit with n nodes gives n − 1 independent KCL equations. This is the basis of nodal analysis.

📑 Contents

  1. What is Kirchhoff's Current Law?
  2. Sign convention and negative currents
  3. Generalised KCL and the supernode
  4. Step-by-step method to solve KCL problems
  5. Solved problems (7)
  6. Common mistakes
  7. Quick revision: KCL vs KVL
  8. FAQs

What is Kirchhoff's Current Law?

Kirchhoff's Current Law (KCL), also called Kirchhoff's first law or the junction rule, was stated by Gustav Kirchhoff in 1845. Along with Kirchhoff's Voltage Law (KVL) and Ohm's law, it is one of the three tools behind every method in network theory: nodal analysis, mesh analysis, Thevenin, Norton and the rest. If you are preparing the DC circuits unit for GATE EE, this is where to start.

📖 Definition

At any node (junction) of an electric circuit, at any instant of time, the algebraic sum of all branch currents is zero. In other words, the total current entering a node equals the total current leaving it.

∑ Formula

\[ \sum_{k=1}^{N} i_k(t) = 0 \qquad \Longleftrightarrow \qquad \sum i_{\text{entering}} = \sum i_{\text{leaving}} \]
i₁i₂i₃i₄Node
Fig. 1: Four branches meeting at a node: i₁ and i₂ enter, i₃ and i₄ leave.

Applying KCL to the node in Fig. 1 (current entering = current leaving):

\[ i_1 + i_2 = i_3 + i_4 \]

Why is KCL true? Conservation of charge

A node is an ideal connection point and has no space to store charge. Current is the rate at which charge flows, \( i = \frac{dq}{dt} \). If more charge flowed into the node than out of it, charge would pile up there, and an ideal node cannot hold charge. So the net charge at the node stays constant:

\[ \frac{dq_{\text{node}}}{dt} = \sum i_{\text{entering}} - \sum i_{\text{leaving}} = 0 \]

KCL is therefore a direct result of the law of conservation of electric charge. Because it does not depend on what the branches contain, it holds for resistors, inductors, capacitors, diodes, transistors and sources alike, and for both DC and AC.

📝 Note: when does KCL hold?

KCL holds for lumped circuits, where the circuit is much smaller than the wavelength of the signal. In ordinary power and electronic circuits this is always true. In high-frequency distributed circuits such as transmission lines and antennas, the wires themselves can store charge, so we use field theory there instead.

Sign Convention and Negative Currents

Before writing KCL, mark a reference direction (an arrow) for every branch current. You can choose the direction freely. The equation decides the actual direction for you. Pick one of the two conventions below and use it for the whole problem:

ConventionCurrent enteringCurrent leavingKCL for Fig. 1
Entering = positive+−\( i_1 + i_2 - i_3 - i_4 = 0 \)
Leaving = positive−+\( -i_1 - i_2 + i_3 + i_4 = 0 \)

Both equations are the same (one is the other multiplied by −1), so they give the same answer. In nodal analysis, most textbooks and GATE solutions take leaving = positive and write each current as \( \frac{V_{\text{node}} - V_{\text{neighbour}}}{R} \).

🎯 GATE tip: negative answer

If a current comes out negative, your calculation is not wrong. The current simply flows opposite to the arrow you drew. A current of −4 A leaving a node is exactly the same as +4 A entering it. Do not redraw the arrow mid-solution. Finish with your original directions and interpret the sign at the end.

Generalised KCL and the Supernode

KCL does not work only at a single junction point. Imagine drawing a closed boundary (a dotted box) around any part of a circuit. Charge cannot collect inside the box, just as it cannot collect at a node. So the box behaves like one big node: the current going into the box must equal the current coming out of it.

The best part is that you do not need to know what is inside the box. It may hold one resistor or a hundred. You only look at the wires crossing the boundary. This boundary is called a closed surface (or cut-set), and this form of the law is called generalised KCL. See Solved Problem Q3 below, where this idea gives the answer without knowing any resistor values.

∑ Generalised KCL

\[ \sum i_{\text{crossing into surface}} = \sum i_{\text{crossing out of surface}} \]
◯

Closed surface

Draw a boundary around a whole sub-network and treat it like one big node. You do not need the values inside.

⚡

Supernode

When a voltage source sits between two non-reference nodes, enclose both nodes and the source in one surface, and write a single KCL for it.

n

Independent equations

A connected circuit with n nodes has only n − 1 independent KCL equations. The equation for the last node adds no new information.

🎯 GATE / graph-theory link

In network topology, the number of independent KCL equations equals the rank of the incidence matrix, which is \( n - 1 \). The number of independent KVL equations is \( b - n + 1 \) (the number of links). These two counts come up often in GATE network graph questions.

Step-by-Step Method to Solve KCL Problems

Every solution below follows the same six steps. Learn them once and you can use them for any nodal-analysis question in GATE, ESE or university exams.

1

Find the nodes

Mark every junction. Merge points joined by plain wire into one node.

2

Choose a reference

Take the node with the most branches (usually the bottom rail) as ground, 0 V.

3

Name the unknowns

Label node voltages \( V_1, V_2, \dots \) and draw an arrow for each branch current.

4

Use Ohm's law

Write each resistor current leaving a node as \( \frac{V_a - V_b}{R} \).

5

Apply KCL

Write \( \sum i_{\text{leaving}} = 0 \) at each non-reference node (or supernode), then solve.

6

Verify

Put the answers back into KCL at one node. The currents must balance.

Solved Problems on KCL

The problems go from basic node problems to GATE-style circuits with dependent sources and supernodes. Try each question first, then tap Show solution.

Q1Basic · single node

At a node, currents of 5 A and 3 A enter, and currents of 2 A and \( I \) leave, as shown. Find \( I \).

5 A3 A2 AINode
Show solution

Step 1: Write KCL (entering = leaving)

\[ 5 + 3 = 2 + I \]

Step 2: Solve

\[ I = 8 - 2 = 6\ \text{A} \]

The answer is positive, so \( I \) really does leave the node, as drawn.

\( I = 6\ \text{A} \) (leaving the node)
Q2Sign convention

At a node, 10 A enters. The currents leaving through the other three branches are 3 A, −4 A and \( i_4 \). Find \( i_4 \), and state the actual direction of the −4 A current.

10 A3 A−4 Ai₄Node
Show solution

Step 1: Keep every sign exactly as given

\[ \sum i_{\text{in}} = \sum i_{\text{out}} \;\Rightarrow\; 10 = 3 + (-4) + i_4 \]

Step 2: Solve

\[ i_4 = 10 - 3 + 4 = 11\ \text{A} \]

Step 3: Interpret and verify

−4 A leaving means 4 A actually enters the node through that branch. Check: total entering = 10 + 4 = 14 A; total leaving = 3 + 11 = 14 A. ✔

\( i_4 = 11\ \text{A} \) (leaving); the −4 A branch carries 4 A into the node
Q3Generalised KCL

A resistive network is connected to the rest of a circuit only through terminals a, b and c. A current of 7 A enters at terminal a and 2 A leaves at terminal b. Find the current \( I_3 \) leaving terminal c. The resistor values are not given.

closed surface7 Aa2 AbI₃c
Show solution

Step 1: Draw a closed surface around the whole network

The network inside cannot store charge, so it behaves like one big node. We do not need the resistor values.

Step 2: Apply KCL to the surface

\[ 7 = 2 + I_3 \;\Rightarrow\; I_3 = 5\ \text{A} \]
\( I_3 = 5\ \text{A} \) (leaving terminal c)

This idea explains why, in a three-phase system, \( I_a + I_b + I_c = 0 \) for a three-wire star load. It also explains why the transistor currents satisfy \( I_E = I_B + I_C \).

Q4Nodal · one unknown

In the circuit shown, find the node voltage \( V \) and the currents through the 4 Ω and 12 Ω resistors.

+−24 V4 Ω12 Ω1 AV
Show solution

Step 1: Reference and unknown

Take the bottom rail as ground. The only unknown is the node voltage \( V \).

Step 2: KCL at node V (leaving = positive)

\[ \frac{V - 24}{4} + \frac{V}{12} - 1 = 0 \]

The 1 A source pushes current into the node, so it appears with a minus sign.

Step 3: Multiply by 12 and solve

\[ 3(V - 24) + V - 12 = 0 \;\Rightarrow\; 4V = 84 \;\Rightarrow\; V = 21\ \text{V} \]

Step 4: Branch currents

\[ I_{4\Omega} = \frac{24 - 21}{4} = 0.75\ \text{A}\ (\text{into node}), \qquad I_{12\Omega} = \frac{21}{12} = 1.75\ \text{A}\ (\text{down}) \]

Step 5: Verify KCL

\[ 0.75 + 1 = 1.75\ \text{A} \quad \checkmark \]
\( V = 21\ \text{V},\; I_{4\Omega} = 0.75\ \text{A},\; I_{12\Omega} = 1.75\ \text{A} \)
Q5Two nodes · GATE-style

Using KCL, find the node voltages \( V_1 \) and \( V_2 \), and the current in each resistor.

9 A6 Ω2 Ω4 ΩV₁V₂
Show solution

Step 1: KCL at node 1

\[ \frac{V_1}{6} + \frac{V_1 - V_2}{2} = 9 \;\xrightarrow{\times 6}\; 4V_1 - 3V_2 = 54 \quad \cdots (1) \]

Step 2: KCL at node 2

\[ \frac{V_2 - V_1}{2} + \frac{V_2}{4} = 0 \;\xrightarrow{\times 4}\; 3V_2 = 2V_1 \;\Rightarrow\; V_2 = \tfrac{2}{3}V_1 \quad \cdots (2) \]

Step 3: Substitute (2) in (1)

\[ 4V_1 - 2V_1 = 54 \;\Rightarrow\; V_1 = 27\ \text{V}, \qquad V_2 = 18\ \text{V} \]

Step 4: Branch currents

\[ I_{6\Omega} = \frac{27}{6} = 4.5\ \text{A}, \quad I_{2\Omega} = \frac{27 - 18}{2} = 4.5\ \text{A}, \quad I_{4\Omega} = \frac{18}{4} = 4.5\ \text{A} \]

Check at node 1: \( 4.5 + 4.5 = 9\ \text{A} \) ✔

\( V_1 = 27\ \text{V},\; V_2 = 18\ \text{V} \); each resistor carries 4.5 A

⚡ 30-second shortcut

The right branch is \( 2 + 4 = 6\ \Omega \), which is in parallel with 6 Ω. Equal resistances split the 9 A equally, so 4.5 A flows in each branch. Then \( V_1 = 4.5 \times 6 = 27\ \text{V} \) and \( V_2 = 4.5 \times 4 = 18\ \text{V} \). In GATE, look for this kind of shortcut before writing equations.

Q6Dependent source · GATE-style

The circuit contains a current-controlled current source of value \( 2I_x \), where \( I_x \) is the current through the 4 Ω resistor. Find \( V \), \( I_x \), and the current through the 10 V source. Also verify the power balance.

+−10 V2 Ω4 ΩIₓ2IₓV
Show solution

Step 1: Express the controlling variable in terms of node voltage

\[ I_x = \frac{V}{4} \]

Step 2: KCL at node V (leaving = positive)

\[ \frac{V - 10}{2} + \frac{V}{4} - 2I_x = 0 \;\Rightarrow\; \frac{V - 10}{2} + \frac{V}{4} - \frac{V}{2} = 0 \]

Step 3: Simplify

\[ -5 + \frac{V}{4} = 0 \;\Rightarrow\; V = 20\ \text{V}, \qquad I_x = \frac{20}{4} = 5\ \text{A} \]

Step 4: Current through the 10 V source

\[ I_{2\Omega} = \frac{10 - 20}{2} = -5\ \text{A} \]

The minus sign means 5 A flows from the node back into the + terminal of the 10 V source. Current entering the + terminal means this source absorbs power. The node voltage (20 V) is higher than the source voltage, which can only happen because the dependent source is active.

Step 5: Power balance

\[ P_{\text{dep}} = V(2I_x) = 20 \times 10 = 200\ \text{W (supplied)} \] \[ P_{4\Omega} + P_{2\Omega} + P_{10\text{V}} = 5^2(4) + 5^2(2) + 10(5) = 100 + 50 + 50 = 200\ \text{W} \quad \checkmark \]
\( V = 20\ \text{V},\; I_x = 5\ \text{A} \); 5 A flows into the + terminal of the 10 V source
Q7Supernode

A 4 V source is connected between nodes \( V_1 \) and \( V_2 \), with its + terminal at \( V_2 \). Find \( V_1 \), \( V_2 \) and the current through the 4 V source.

7 A2 Ω−+4 V4 ΩV₁V₂
Show solution

Step 1: Why a supernode?

The current through an ideal voltage source cannot be written with Ohm's law. So we enclose \( V_1 \), \( V_2 \) and the 4 V source in one closed surface (the orange dashed box) and apply generalised KCL to it.

Step 2: Constraint equation from the source

\[ V_2 - V_1 = 4 \quad \cdots (1) \]

Step 3: KCL for the supernode

\[ \frac{V_1}{2} + \frac{V_2}{4} = 7 \quad \cdots (2) \]

Step 4: Substitute \( V_2 = V_1 + 4 \) and solve

\[ \frac{V_1}{2} + \frac{V_1 + 4}{4} = 7 \;\xrightarrow{\times 4}\; 3V_1 + 4 = 28 \;\Rightarrow\; V_1 = 8\ \text{V}, \quad V_2 = 12\ \text{V} \]

Step 5: Current through the source (KCL at node V2)

\[ I_{\text{src}} = \frac{V_2}{4} = 3\ \text{A} \quad (\text{from } V_1 \text{ to } V_2) \]

Check at node 1: \( 7 = \frac{8}{2} + 3 = 4 + 3 \) ✔

\( V_1 = 8\ \text{V},\; V_2 = 12\ \text{V},\; I_{\text{src}} = 3\ \text{A} \)

Common Mistakes Students Make with KCL

  • Mixing conventions: taking "entering = positive" for some branches and "leaving = positive" for others in the same equation.
  • Forgetting source currents: an independent current source must appear in the KCL equation of both nodes it is connected to.
  • Counting a wire as two nodes: points joined only by an ideal wire are one node, at one voltage.
  • Using Ohm's law on a voltage source: an ideal voltage source can carry any current. Use a supernode or an extra unknown instead.
  • Writing KCL at every node, including ground: with n nodes, only n − 1 equations are independent. If you include the reference node, the equation set cannot be solved uniquely.
  • Ignoring the controlling variable: for dependent sources, always rewrite \( I_x \) or \( V_x \) in terms of node voltages before solving.

⚠️ Exam trap

Two ideal current sources of different values in series, or a node fed only by current sources whose sum is not zero, violates KCL. GATE sometimes asks whether such a circuit is "valid". The answer is no.

Quick Revision: KCL vs KVL

PointKCLKVL
Applied atNode / closed surfaceClosed loop / mesh
Statement\( \sum i = 0 \)\( \sum v = 0 \)
Based onConservation of chargeConservation of energy
Independent equations\( n - 1 \)\( b - n + 1 \)
Leads toNodal analysisMesh / loop analysis
Special caseSupernodeSupermesh

🎯 Which one to use in GATE?

Count the equations before you start. If \( (n - 1) \lt (b - n + 1) \), nodal analysis (KCL) is faster. Circuits with many current sources also favour KCL, while circuits with many voltage sources in series loops favour KVL.

Frequently Asked Questions

What is Kirchhoff's Current Law in simple words?

The total current flowing into a junction equals the total current flowing out of it. Charge cannot pile up at a node, so whatever comes in must go out.

Kirchhoff's Current Law is based on which conservation law?

KCL is based on the law of conservation of electric charge. KVL is based on the law of conservation of energy.

Is KCL valid for AC circuits and non-linear elements?

Yes. KCL holds at every instant for any lumped circuit, whether DC or AC, linear or non-linear, time-invariant or time-varying. For AC circuits in steady state it also holds for phasor currents: \( \sum \bar{I} = 0 \).

What does a negative current mean in a KCL answer?

It means the actual current flows opposite to the reference arrow you assumed. The size is still correct. Only the direction is reversed.

When should I use a supernode?

Use a supernode when a voltage source (independent or dependent) is connected between two non-reference nodes. Enclose both nodes and the source, write one KCL for the combined region, and add the source's voltage constraint equation.

How many KCL equations are needed for a circuit with n nodes?

A connected circuit with n nodes has n − 1 independent KCL equations. One node is chosen as the reference (ground), and KCL is written at each of the others.

📌 Further reading & related tutorials

SB
Sanket Barde Assistant Professor, Electrical Engineering · 13+ years of teaching

Writes clear, exam-focused notes and builds free virtual labs on EEGATE to help GATE EE and JEE students learn by doing.

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